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no111u3mvertescher
no111u3
authored and
mvertescher
committed
Better consistency with STM32F4XX-HAL
1 parent 4f42876 commit 471ca4d

23 files changed

+170
-152
lines changed

‎examples/blinky.rs

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -9,12 +9,12 @@ extern crate panic_halt;
99

1010
use stm32f7xx_hal as hal;
1111

12-
use crate::hal::{device, prelude::*};
12+
use crate::hal::{pac, prelude::*};
1313
use cortex_m_rt::entry;
1414

1515
#[entry]
1616
fn main() -> ! {
17-
let p = device::Peripherals::take().unwrap();
17+
let p = pac::Peripherals::take().unwrap();
1818

1919
let gpioi = p.GPIOI.split();
2020
let mut led = gpioi.pi1.into_push_pull_output();

‎examples/blinky_delay.rs

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -8,11 +8,11 @@
88
extern crate panic_halt;
99

1010
use cortex_m_rt::entry;
11-
use stm32f7xx_hal::{delay::Delay, device, prelude::*};
11+
use stm32f7xx_hal::{delay::Delay, pac, prelude::*};
1212

1313
#[entry]
1414
fn main() -> ! {
15-
let p = device::Peripherals::take().unwrap();
15+
let p = pac::Peripherals::take().unwrap();
1616
let cp = cortex_m::Peripherals::take().unwrap();
1717

1818
let gpioi = p.GPIOI.split();

‎examples/flash.rs

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -10,13 +10,13 @@ extern crate panic_semihosting;
1010
use cortex_m_rt::entry;
1111
use cortex_m_semihosting::hprintln;
1212

13-
use stm32f7xx_hal::{device, flash::Flash};
13+
use stm32f7xx_hal::{flash::Flash, pac};
1414

1515
const DATA: &[u8] = &[0, 1, 2, 3, 4];
1616

1717
#[entry]
1818
fn main() -> ! {
19-
let p = device::Peripherals::take().unwrap();
19+
let p = pac::Peripherals::take().unwrap();
2020

2121
let mut flash = Flash::new(p.FLASH);
2222

‎examples/serial_delay.rs

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -14,14 +14,14 @@ use core::fmt::Write;
1414
use cortex_m_rt::entry;
1515
use stm32f7xx_hal::{
1616
delay::Delay,
17-
device,
17+
pac,
1818
prelude::*,
1919
serial::{self, Serial},
2020
};
2121

2222
#[entry]
2323
fn main() -> ! {
24-
let p = device::Peripherals::take().unwrap();
24+
let p = pac::Peripherals::take().unwrap();
2525
let cp = cortex_m::Peripherals::take().unwrap();
2626

2727
let rcc = p.RCC.constrain();

‎examples/serial_dma.rs

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -16,15 +16,15 @@ use core::pin::Pin;
1616
use cortex_m::{asm, interrupt};
1717
use cortex_m_rt::entry;
1818
use stm32f7xx_hal::{
19-
device,
2019
dma::{self, DMA},
20+
pac,
2121
prelude::*,
2222
serial::{self, Serial},
2323
};
2424

2525
#[entry]
2626
fn main() -> ! {
27-
let p = device::Peripherals::take().unwrap();
27+
let p = pac::Peripherals::take().unwrap();
2828

2929
let mut rcc = p.RCC.constrain();
3030

‎examples/serial_echo.rs

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -13,14 +13,14 @@ use nb::block;
1313

1414
use cortex_m_rt::entry;
1515
use stm32f7xx_hal::{
16-
device,
16+
pac,
1717
prelude::*,
1818
serial::{self, Serial},
1919
};
2020

2121
#[entry]
2222
fn main() -> ! {
23-
let p = device::Peripherals::take().unwrap();
23+
let p = pac::Peripherals::take().unwrap();
2424

2525
let rcc = p.RCC.constrain();
2626
let clocks = rcc.cfgr.sysclk(216.mhz()).freeze();

‎examples/spi.rs

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -5,14 +5,14 @@ extern crate panic_semihosting;
55

66
use cortex_m_rt::entry;
77
use stm32f7xx_hal::{
8-
device,
8+
pac,
99
prelude::*,
1010
spi::{self, Spi},
1111
};
1212

1313
#[entry]
1414
fn main() -> ! {
15-
let p = device::Peripherals::take().unwrap();
15+
let p = pac::Peripherals::take().unwrap();
1616

1717
let mut rcc = p.RCC.constrain();
1818

‎examples/spi_16.rs

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -5,14 +5,14 @@ extern crate panic_semihosting;
55

66
use cortex_m_rt::entry;
77
use stm32f7xx_hal::{
8-
device,
8+
pac,
99
prelude::*,
1010
spi::{self, Spi},
1111
};
1212

1313
#[entry]
1414
fn main() -> ! {
15-
let p = device::Peripherals::take().unwrap();
15+
let p = pac::Peripherals::take().unwrap();
1616

1717
let mut rcc = p.RCC.constrain();
1818

‎examples/spi_dma.rs

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -8,15 +8,15 @@ use core::pin::Pin;
88
use cortex_m::{asm, interrupt};
99
use cortex_m_rt::entry;
1010
use stm32f7xx_hal::{
11-
device,
1211
dma::{self, DMA},
12+
pac,
1313
prelude::*,
1414
spi::{self, Spi},
1515
};
1616

1717
#[entry]
1818
fn main() -> ! {
19-
let p = device::Peripherals::take().unwrap();
19+
let p = pac::Peripherals::take().unwrap();
2020

2121
let mut rcc = p.RCC.constrain();
2222

‎examples/spi_dma_16.rs

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -8,15 +8,15 @@ use core::pin::Pin;
88
use cortex_m::{asm, interrupt};
99
use cortex_m_rt::entry;
1010
use stm32f7xx_hal::{
11-
device,
1211
dma::{self, DMA},
12+
pac,
1313
prelude::*,
1414
spi::{self, Spi},
1515
};
1616

1717
#[entry]
1818
fn main() -> ! {
19-
let p = device::Peripherals::take().unwrap();
19+
let p = pac::Peripherals::take().unwrap();
2020

2121
let mut rcc = p.RCC.constrain();
2222

‎examples/stm32f7disco-screen/main.rs

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -15,9 +15,9 @@ use embedded_graphics::{
1515
};
1616

1717
use stm32f7xx_hal::{
18-
device,
1918
gpio::Speed,
2019
ltdc::{Layer, PixelFormat},
20+
pac,
2121
prelude::*,
2222
rcc::{HSEClock, HSEClockMode, Rcc},
2323
};
@@ -34,7 +34,7 @@ static mut FB_LAYER1: [u16; FB_GRAPHICS_SIZE] = [0; FB_GRAPHICS_SIZE];
3434

3535
#[entry]
3636
fn main() -> ! {
37-
let perif = device::Peripherals::take().unwrap();
37+
let perif = pac::Peripherals::take().unwrap();
3838
let _cp = cortex_m::Peripherals::take().unwrap();
3939

4040
let rcc_hal: Rcc = perif.RCC.constrain();

‎examples/stm32f7disco-screen/screen.rs

Lines changed: 26 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -2,14 +2,14 @@ use embedded_graphics::{
22
drawable::Pixel,
33
geometry::Size,
44
pixelcolor::{Rgb565, RgbColor},
5+
primitives,
56
style::{PrimitiveStyle, Styled},
67
DrawTarget,
7-
primitives
88
};
99

1010
use stm32f7xx_hal::{
11-
device::{LTDC, DMA2D},
12-
ltdc::{DisplayConfig, Layer, DisplayController, SupportedWord, PixelFormat},
11+
ltdc::{DisplayConfig, DisplayController, Layer, PixelFormat, SupportedWord},
12+
pac::{DMA2D, LTDC},
1313
rcc::{HSEClock, HSEClockMode},
1414
time::U32Ext,
1515
};
@@ -45,9 +45,7 @@ impl<T: 'static + SupportedWord> Stm32F7DiscoDisplay<T> {
4545
Some(&HSEClock::new(25.mhz(), HSEClockMode::Bypass)),
4646
);
4747

48-
Stm32F7DiscoDisplay {
49-
controller,
50-
}
48+
Stm32F7DiscoDisplay { controller }
5149
}
5250
}
5351

@@ -68,22 +66,36 @@ impl DrawTarget<Rgb565> for Stm32F7DiscoDisplay<u16> {
6866
}
6967

7068
/// Draw a hardware accelerated (by DMA2D) rectangle
71-
fn draw_rectangle(&mut self, item: &Styled<primitives::Rectangle, PrimitiveStyle<Rgb565>>) -> Result<(), Self::Error> {
69+
fn draw_rectangle(
70+
&mut self,
71+
item: &Styled<primitives::Rectangle, PrimitiveStyle<Rgb565>>,
72+
) -> Result<(), Self::Error> {
7273
if item.style.stroke_color.is_none() {
73-
let top_left = (item.primitive.top_left.x as usize, item.primitive.top_left.y as usize);
74-
let bottom_right = (item.primitive.bottom_right.x as usize, item.primitive.bottom_right.y as usize);
74+
let top_left = (
75+
item.primitive.top_left.x as usize,
76+
item.primitive.top_left.y as usize,
77+
);
78+
let bottom_right = (
79+
item.primitive.bottom_right.x as usize,
80+
item.primitive.bottom_right.y as usize,
81+
);
7582
let color = match item.style.fill_color {
76-
Some(c) => {
77-
(c.b() as u32 & 0x1F) | ((c.g() as u32 & 0x3F) << 5) | ((c.r() as u32 & 0x1F) << 11)
78-
},
79-
None => 0u32
83+
Some(c) => {
84+
(c.b() as u32 & 0x1F)
85+
| ((c.g() as u32 & 0x3F) << 5)
86+
| ((c.r() as u32 & 0x1F) << 11)
87+
}
88+
None => 0u32,
8089
};
8190

8291
// Note(unsafe) because transfert might not be before an other write
8392
// to the buffer occurs. However, such Register -> Buffer transfert
8493
// is so fast that such issue does not occur
8594
// TODO : use safer DMA api when the embedde-hal DMA traits will be stabilised
86-
unsafe {self.controller.draw_rectangle(Layer::L1, top_left, bottom_right, color);}
95+
unsafe {
96+
self.controller
97+
.draw_rectangle(Layer::L1, top_left, bottom_right, color);
98+
}
8799
} else {
88100
self.draw_iter(item).unwrap();
89101
}

‎examples/timer.rs

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,7 @@
11
//! Test the general purpose timers
22
33
#![deny(unsafe_code)]
4-
#![deny(warnings)]
4+
//#![deny(warnings)]
55
#![no_std]
66
#![no_main]
77

@@ -13,7 +13,7 @@ use cortex_m_rt::entry;
1313
use cortex_m_semihosting::hio;
1414

1515
use stm32f7xx_hal::{
16-
device, interrupt,
16+
interrupt, pac,
1717
prelude::*,
1818
timer::{Event, Timer},
1919
};
@@ -24,13 +24,13 @@ fn main() -> ! {
2424
writeln!(hstdout, "Starting timer...").unwrap();
2525

2626
let cp = cortex_m::Peripherals::take().unwrap();
27-
let dp = device::Peripherals::take().unwrap();
27+
let dp = pac::Peripherals::take().unwrap();
2828

2929
let mut rcc = dp.RCC.constrain();
3030
let clocks = rcc.cfgr.freeze();
3131

3232
let mut nvic = cp.NVIC;
33-
nvic.enable(device::Interrupt::TIM2);
33+
nvic.enable(pac::Interrupt::TIM2);
3434
let mut timer = Timer::tim2(dp.TIM2, 1.hz(), clocks, &mut rcc.apb1);
3535
timer.listen(Event::TimeOut);
3636

‎src/dma.rs

Lines changed: 29 additions & 29 deletions
Original file line numberDiff line numberDiff line change
@@ -11,7 +11,7 @@ use core::{
1111
use as_slice::AsSlice;
1212

1313
use crate::{
14-
device::{
14+
pac::{
1515
self,
1616
dma2::{self, st::cr},
1717
Interrupt, DMA1, DMA2, NVIC,
@@ -391,50 +391,50 @@ macro_rules! impl_target {
391391
// victory and leave this problem to someone who actually needs this capability.
392392
impl_target!(
393393
// SPI receive
394-
spi::Rx<device::SPI1>, DMA2, Stream0, Channel3, DMA2_STREAM0;
394+
spi::Rx<pac::SPI1>, DMA2, Stream0, Channel3, DMA2_STREAM0;
395395
// SPI1 for DMA2, stream 2, channel 3 is unsupported
396-
spi::Rx<device::SPI2>, DMA1, Stream3, Channel0, DMA1_STREAM3;
397-
spi::Rx<device::SPI3>, DMA1, Stream0, Channel0, DMA1_STREAM0;
396+
spi::Rx<pac::SPI2>, DMA1, Stream3, Channel0, DMA1_STREAM3;
397+
spi::Rx<pac::SPI3>, DMA1, Stream0, Channel0, DMA1_STREAM0;
398398
// SPI3 for DMA1, stream 2, channel 0 is unsupported
399-
spi::Rx<device::SPI4>, DMA2, Stream0, Channel4, DMA2_STREAM0;
399+
spi::Rx<pac::SPI4>, DMA2, Stream0, Channel4, DMA2_STREAM0;
400400
// SPI4 for DMA2, stream 3, channel 5 is unsupported
401-
spi::Rx<device::SPI5>, DMA2, Stream3, Channel2, DMA2_STREAM3;
401+
spi::Rx<pac::SPI5>, DMA2, Stream3, Channel2, DMA2_STREAM3;
402402
// SPI5 for DMA2, stream 5, channel 7 is unsupported
403403

404404
// SPI transmit
405-
spi::Tx<device::SPI1>, DMA2, Stream3, Channel3, DMA2_STREAM3;
405+
spi::Tx<pac::SPI1>, DMA2, Stream3, Channel3, DMA2_STREAM3;
406406
// SPI1 for DMA2, stream 5, channel 3 is unsupported
407-
spi::Tx<device::SPI2>, DMA1, Stream4, Channel0, DMA1_STREAM4;
408-
spi::Tx<device::SPI3>, DMA1, Stream5, Channel0, DMA1_STREAM5;
407+
spi::Tx<pac::SPI2>, DMA1, Stream4, Channel0, DMA1_STREAM4;
408+
spi::Tx<pac::SPI3>, DMA1, Stream5, Channel0, DMA1_STREAM5;
409409
// SPI3 for DMA1, stream 7, channel 0 is unsupported
410-
spi::Tx<device::SPI4>, DMA2, Stream1, Channel4, DMA2_STREAM1;
410+
spi::Tx<pac::SPI4>, DMA2, Stream1, Channel4, DMA2_STREAM1;
411411
// SPI4 for DMA2, stream 4, channel 5 is unsupported
412-
spi::Tx<device::SPI5>, DMA2, Stream4, Channel2, DMA2_STREAM4;
412+
spi::Tx<pac::SPI5>, DMA2, Stream4, Channel2, DMA2_STREAM4;
413413
// SPI5 for DMA2, stream 6, channel 7 is unsupported
414414

415415
// USART receive
416-
serial::Rx<device::USART1>, DMA2, Stream2, Channel4, DMA2_STREAM2;
416+
serial::Rx<pac::USART1>, DMA2, Stream2, Channel4, DMA2_STREAM2;
417417
// USART1 for DMA2, stream 5, channel 4 is unsupported
418-
serial::Rx<device::USART2>, DMA1, Stream5, Channel4, DMA1_STREAM5;
419-
serial::Rx<device::USART3>, DMA1, Stream1, Channel4, DMA1_STREAM1;
420-
serial::Rx<device::UART4>, DMA1, Stream2, Channel4, DMA1_STREAM2;
421-
serial::Rx<device::UART5>, DMA1, Stream0, Channel4, DMA1_STREAM0;
422-
serial::Rx<device::USART6>, DMA2, Stream1, Channel5, DMA2_STREAM1;
418+
serial::Rx<pac::USART2>, DMA1, Stream5, Channel4, DMA1_STREAM5;
419+
serial::Rx<pac::USART3>, DMA1, Stream1, Channel4, DMA1_STREAM1;
420+
serial::Rx<pac::UART4>, DMA1, Stream2, Channel4, DMA1_STREAM2;
421+
serial::Rx<pac::UART5>, DMA1, Stream0, Channel4, DMA1_STREAM0;
422+
serial::Rx<pac::USART6>, DMA2, Stream1, Channel5, DMA2_STREAM1;
423423
// USART6 for DMA2, stream 2, channel 5 is unsupported
424-
serial::Rx<device::UART7>, DMA1, Stream3, Channel5, DMA1_STREAM3;
425-
serial::Rx<device::UART8>, DMA1, Stream6, Channel5, DMA1_STREAM6;
424+
serial::Rx<pac::UART7>, DMA1, Stream3, Channel5, DMA1_STREAM3;
425+
serial::Rx<pac::UART8>, DMA1, Stream6, Channel5, DMA1_STREAM6;
426426

427427
// USART transmit
428-
serial::Tx<device::USART1>, DMA2, Stream7, Channel4, DMA2_STREAM7;
429-
serial::Tx<device::USART2>, DMA1, Stream6, Channel4, DMA1_STREAM6;
430-
serial::Tx<device::USART3>, DMA1, Stream3, Channel4, DMA1_STREAM3;
428+
serial::Tx<pac::USART1>, DMA2, Stream7, Channel4, DMA2_STREAM7;
429+
serial::Tx<pac::USART2>, DMA1, Stream6, Channel4, DMA1_STREAM6;
430+
serial::Tx<pac::USART3>, DMA1, Stream3, Channel4, DMA1_STREAM3;
431431
// USART3 for DMA1, stream 4, channel 7 is unsupported
432-
serial::Tx<device::UART4>, DMA1, Stream4, Channel4, DMA1_STREAM4;
433-
serial::Tx<device::UART5>, DMA1, Stream7, Channel4, DMA1_STREAM7;
434-
serial::Tx<device::USART6>, DMA2, Stream6, Channel5, DMA2_STREAM6;
432+
serial::Tx<pac::UART4>, DMA1, Stream4, Channel4, DMA1_STREAM4;
433+
serial::Tx<pac::UART5>, DMA1, Stream7, Channel4, DMA1_STREAM7;
434+
serial::Tx<pac::USART6>, DMA2, Stream6, Channel5, DMA2_STREAM6;
435435
// USART6 for DMA2, stream 7, channel 5 is unsupported
436-
serial::Tx<device::UART7>, DMA1, Stream1, Channel5, DMA1_STREAM1;
437-
serial::Tx<device::UART8>, DMA1, Stream0, Channel5, DMA1_STREAM0;
436+
serial::Tx<pac::UART7>, DMA1, Stream1, Channel5, DMA1_STREAM1;
437+
serial::Tx<pac::UART8>, DMA1, Stream0, Channel5, DMA1_STREAM0;
438438
);
439439

440440
#[cfg(any(
@@ -449,8 +449,8 @@ impl_target!(
449449
feature = "stm32f779",
450450
))]
451451
impl_target!(
452-
spi::Rx<device::SPI6>, DMA2, Stream6, Channel1, DMA2_STREAM6;
453-
spi::Tx<device::SPI6>, DMA2, Stream5, Channel1, DMA2_STREAM5;
452+
spi::Rx<pac::SPI6>, DMA2, Stream6, Channel1, DMA2_STREAM6;
453+
spi::Tx<pac::SPI6>, DMA2, Stream5, Channel1, DMA2_STREAM5;
454454
);
455455

456456
/// Implemented for all types that represent DMA streams

‎src/flash.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
//! Flash memory
22
3-
use crate::device::FLASH;
3+
use crate::pac::FLASH;
44
use nb::block;
55

66
/// Base address of flash memory on AXIM interface.

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