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sylvioalvesalmir-okato
sylvioalves
authored and
almir-okato
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espressif: extend loader data
Add additional regions in loader to include RTC, LP, IROM and DROM information. Signed-off-by: Sylvio Alves <[email protected]>
1 parent 0cd1d0a commit cd22b69

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4 files changed

+88
-9
lines changed

4 files changed

+88
-9
lines changed

‎boot/espressif/hal/include/esp_mcuboot_image.h

+21-8
Original file line numberDiff line numberDiff line change
@@ -15,12 +15,25 @@
1515
* for MCUboot-Espressif port booting.
1616
*/
1717
typedef struct esp_image_load_header {
18-
uint32_t header_magic; /* Magic for load header */
19-
uint32_t entry_addr; /* Application entry address */
20-
uint32_t iram_dest_addr; /* Destination address(VMA) for IRAM region */
21-
uint32_t iram_flash_offset; /* Flash offset(LMA) for start of IRAM region */
22-
uint32_t iram_size; /* Size of IRAM region */
23-
uint32_t dram_dest_addr; /* Destination address(VMA) for DRAM region */
24-
uint32_t dram_flash_offset; /* Flash offset(LMA) for start of DRAM region */
25-
uint32_t dram_size; /* Size of DRAM region */
18+
uint32_t header_magic; /* Magic for load header */
19+
uint32_t entry_addr; /* Application entry address */
20+
uint32_t iram_dest_addr; /* Destination address(VMA) for IRAM region */
21+
uint32_t iram_flash_offset; /* Flash offset(LMA) for start of IRAM region */
22+
uint32_t iram_size; /* Size of IRAM region */
23+
uint32_t dram_dest_addr; /* Destination address(VMA) for DRAM region */
24+
uint32_t dram_flash_offset; /* Flash offset(LMA) for start of DRAM region */
25+
uint32_t dram_size; /* Size of DRAM region */
26+
uint32_t lp_rtc_iram_dest_addr; /* Destination address (VMA) for LP_IRAM region */
27+
uint32_t lp_rtc_iram_flash_offset; /* Flash offset (LMA) for LP_IRAM region */
28+
uint32_t lp_rtc_iram_size; /* Size of LP_IRAM region */
29+
uint32_t lp_rtc_dram_dest_addr; /* Destination address (VMA) for LP_DRAM region */
30+
uint32_t lp_rtc_dram_flash_offset; /* Flash offset (LMA) for LP_DRAM region */
31+
uint32_t lp_rtc_dram_size; /* Size of LP_DRAM region */
32+
uint32_t irom_map_addr; /* Mapped address (VMA) for IROM region */
33+
uint32_t irom_flash_offset; /* Flash offset (LMA) for IROM region */
34+
uint32_t irom_size; /* Size of IROM region */
35+
uint32_t drom_map_addr; /* Mapped address (VMA) for DROM region */
36+
uint32_t drom_flash_offset; /* Flash offset (LMA) for DROM region */
37+
uint32_t drom_size; /* Size of DROM region */
38+
uint32_t _reserved[4]; /* Up to 24 words reserved for the header */
2639
} esp_image_load_header_t;

‎boot/espressif/port/esp32s2/ld/bootloader.ld

+1-1
Original file line numberDiff line numberDiff line change
@@ -14,7 +14,7 @@ MEMORY
1414
{
1515
iram_seg (RWX) : org = 0x40047000, len = 0x9000
1616
iram_loader_seg (RWX) : org = 0x40050000, len = 0x6000
17-
dram_seg (RW) : org = 0x3FFE6000, len = 0x9000
17+
dram_seg (RW) : org = 0x3FFE6000, len = 0x9A00
1818
}
1919

2020
/* Default entry point: */

‎boot/espressif/port/esp_loader.c

+65
Original file line numberDiff line numberDiff line change
@@ -23,6 +23,24 @@
2323
#include "app_cpu_start.h"
2424
#endif
2525

26+
#include "esp_rom_sys.h"
27+
#include "esp_cpu.h"
28+
29+
#if CONFIG_IDF_TARGET_ESP32
30+
#define LP_RTC_PREFIX "RTC"
31+
#elif CONFIG_IDF_TARGET_ESP32S2
32+
#define LP_RTC_PREFIX "RTC"
33+
#elif CONFIG_IDF_TARGET_ESP32S3
34+
#define LP_RTC_PREFIX "RTC"
35+
#elif CONFIG_IDF_TARGET_ESP32C2
36+
#elif CONFIG_IDF_TARGET_ESP32C3
37+
#define LP_RTC_PREFIX "RTC"
38+
#elif CONFIG_IDF_TARGET_ESP32C6
39+
#define LP_RTC_PREFIX "LP"
40+
#elif CONFIG_IDF_TARGET_ESP32H2
41+
#define LP_RTC_PREFIX "LP"
42+
#endif
43+
2644
static int load_segment(const struct flash_area *fap, uint32_t data_addr, uint32_t data_len, uint32_t load_addr)
2745
{
2846
const uint32_t *data = (const uint32_t *)bootloader_mmap((fap->fa_off + data_addr), data_len);
@@ -69,6 +87,26 @@ void esp_app_image_load(int image_index, int slot, unsigned int hdr_offset, unsi
6987
FIH_PANIC;
7088
}
7189

90+
#if SOC_RTC_FAST_MEM_SUPPORTED
91+
if (load_header.lp_rtc_iram_size > 0) {
92+
if (!esp_ptr_in_rtc_iram_fast((void *)load_header.lp_rtc_iram_dest_addr) ||
93+
!esp_ptr_in_rtc_iram_fast((void *)(load_header.lp_rtc_iram_dest_addr + load_header.lp_rtc_iram_size))) {
94+
BOOT_LOG_ERR("%s_IRAM region in load header is not valid. Aborting", LP_RTC_PREFIX);
95+
FIH_PANIC;
96+
}
97+
}
98+
#endif
99+
100+
#if SOC_RTC_SLOW_MEM_SUPPORTED
101+
if (load_header.lp_rtc_dram_size > 0) {
102+
if (!esp_ptr_in_rtc_slow((void *)load_header.lp_rtc_dram_dest_addr) ||
103+
!esp_ptr_in_rtc_slow((void *)(load_header.lp_rtc_dram_dest_addr + load_header.lp_rtc_dram_size))) {
104+
BOOT_LOG_ERR("%s_RAM region in load header is not valid. Aborting %p", LP_RTC_PREFIX, load_header.lp_rtc_dram_dest_addr);
105+
FIH_PANIC;
106+
}
107+
}
108+
#endif
109+
72110
if (!esp_ptr_in_iram((void *)load_header.entry_addr)) {
73111
BOOT_LOG_ERR("Application entry point (0x%x) is not in IRAM. Aborting", load_header.entry_addr);
74112
FIH_PANIC;
@@ -80,6 +118,33 @@ void esp_app_image_load(int image_index, int slot, unsigned int hdr_offset, unsi
80118
BOOT_LOG_INF("IRAM segment: start=0x%x, size=0x%x, vaddr=0x%x", fap->fa_off + load_header.iram_flash_offset, load_header.iram_size, load_header.iram_dest_addr);
81119
load_segment(fap, load_header.iram_flash_offset, load_header.iram_size, load_header.iram_dest_addr);
82120

121+
#if SOC_RTC_FAST_MEM_SUPPORTED || SOC_RTC_SLOW_MEM_SUPPORTED
122+
if (load_header.lp_rtc_dram_size > 0) {
123+
soc_reset_reason_t reset_reason = esp_rom_get_reset_reason(0);
124+
125+
/* Unless waking from deep sleep (implying RTC memory is intact), load its segments */
126+
if (reset_reason != RESET_REASON_CORE_DEEP_SLEEP) {
127+
BOOT_LOG_INF("%s_RAM segment: paddr=%08xh, vaddr=%08xh, size=%05xh (%6d) load", LP_RTC_PREFIX,
128+
(fap->fa_off + load_header.lp_rtc_dram_flash_offset), load_header.lp_rtc_dram_dest_addr,
129+
load_header.lp_rtc_dram_size, load_header.lp_rtc_dram_size);
130+
load_segment(fap, load_header.lp_rtc_dram_flash_offset,
131+
load_header.lp_rtc_dram_size, load_header.lp_rtc_dram_dest_addr);
132+
} else {
133+
BOOT_LOG_INF("%s_RAM segment: paddr=%08xh, vaddr=%08xh, size=%05xh (%6d) noload", LP_RTC_PREFIX,
134+
load_header.lp_rtc_dram_flash_offset, load_header.lp_rtc_dram_dest_addr,
135+
load_header.lp_rtc_dram_size, load_header.lp_rtc_dram_size);
136+
}
137+
}
138+
139+
if (load_header.lp_rtc_iram_size > 0) {
140+
BOOT_LOG_INF("%s_IRAM segment: paddr=%08xh, vaddr=%08xh, size=%05xh (%6d) load", LP_RTC_PREFIX,
141+
(fap->fa_off + load_header.lp_rtc_iram_flash_offset), load_header.lp_rtc_iram_dest_addr,
142+
load_header.lp_rtc_iram_size, load_header.lp_rtc_iram_size);
143+
load_segment(fap, load_header.lp_rtc_iram_flash_offset,
144+
load_header.lp_rtc_iram_size, load_header.lp_rtc_iram_dest_addr);
145+
}
146+
#endif
147+
83148
BOOT_LOG_INF("start=0x%x", load_header.entry_addr);
84149
uart_tx_wait_idle(0);
85150

‎docs/release-notes.d/espressif-idf-version-checking.md

+1
Original file line numberDiff line numberDiff line change
@@ -1,2 +1,3 @@
11
- Added verification for supported IDF-based HAL version.
22
- Fixed missing macro for XMC flash devices on ESP32-S3
3+
- Extended image loader header to include RTC/LP RAM, DROM and IROM segments.

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